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Wafer-to-wafer hybrid bonding at 400-nm interconnect pitch

Wafer-to-wafer hybrid bonding is an attractive 3D integration technology for stacking multiple heterogeneous chips with high 3D interconnect density. We highlight recent design and technology innovations that enable hybrid Cu, SiCN-to-Cu and SiCN bonding with interconnect pitches down to an unprecedented 400 nm.

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References

  1. Wuu, J. et al. In 2022 IEEE International Solid-State Circuits Conference (ISSCC) 428–429 (IEEE, 2022).

  2. Chew, S. A. et al. In 2023 IEEE International Electron Devices Meeting (IEDM) 13.6 (IEEE, 2023).

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Acknowledgements

The authors thank the 3D system integration department at imec for their contributions and M. Van Bavel for editing this article.

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Correspondence to Soon Aik Chew, Joeri De Vos or Eric Beyne.

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The authors declare no competing interests.

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Chew, S.A., De Vos, J. & Beyne, E. Wafer-to-wafer hybrid bonding at 400-nm interconnect pitch. Nat Rev Electr Eng 1, 71–72 (2024). https://doi.org/10.1038/s44287-024-00019-8

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  • DOI: https://doi.org/10.1038/s44287-024-00019-8

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